1. Field of the Invention
The present invention relates to a bus system and, more particularly, to an ideal bus system used in order that a bus master may transfer data to a bus slave via a bus.
2. Description of the Related Art
In an example of the prior art, a plurality of bus masters are connected on a bus and each bus master transfers data to a bus slave connected to the bus (see the specification of Japanese Patent Laid-Open No. 2001-243176). In this case, the general practice is such that a bus master outputs a transfer request to an arbiter (bus arbitration unit) on the bus and starts data transfer when permission to transfer is given by the arbiter. Further, a fixed priority scheme or round-robin scheme, etc., generally is used as the arbitration algorithm of the arbiter.
In bus arbitration based upon the fixed-priority or round-robin arbitration algorithm, however, it is difficult to assure a deadline required when each bus master performs a data transfer.
For example, even if a “sum of average bands” requested by each bus master within a certain prescribed time period falls within the range of a bus-allocatable band, the sum of bands requested by each of the bus masters may exceed the bus-allocatable band if attention is directed toward part of a time period within the prescribed time period.
In this case, with a simple arbitration algorithm such as the fixed-priority or round-robin arbitration algorithm, a problem which arises is that appropriate bus arbitration cannot be performed from the standpoint of assuring a deadline.
Furthermore, assume a case where there are hierarchically organized buses. If bus arbitration is performed by the simple arbitration algorithm, namely the fixed-priority or round-robin arbitration algorithm, for every hierarchical layer, then a bus master connected in a lower layer cannot always acquire the bus privilege preferentially in a higher layer. The problem which arises is that it is difficult to assure the deadline.
Further, a waiting state develops in a bus master having more transfer capability than necessary with respect to a deadline. In this case, a problem which arises is that power is consumed wastefully owing to supply of a clock even in the waiting state.